Pure DDP-Based Cipher: Architecture Analysis, Hardware Implementation Cost and Performance up to 6.5 Gbps
Using Data-Dependent (DD) Permutations (DDP) as main cryptographic primitive, a new 64-bit block cipher is presented, ten-round DDP-64. Since the sum of all outputs of the conventional DDP is a linear Boolean function, non-linear DDP-based operation F is used additionally in DDP-64. The DDP-64 is a pure DDP-based cipher, i. e. it uses only permutations and the XOR operation. The designed cipher uses very simple key scheduling that defines high performance, especially in the case of frequent key refreshing. A novel feature of DDP-64 is the use of the switchable operation preventing the weak keys. The offered high level security strength does not sacrifice the implementation performance of DDP-64. Design and hardware implementation architectures of this cipher are presented. The synthesis results for both Field Programmable Gate Arrays (FPGA) and Application Specific Integrated Circuits (ASIC) implementations prove that DDP-64 is very flexible and powerful new cipher, especially for high speed WLANs and WPANs. The achieved hardware performance up to 6.5 Gbps and the implementation area cost of DDP-64 are compared with other ciphers, used in security layers of wireless protocols (Bluetooth, WAP, OMA, UMTS and IEEE 802.11). From these comparisons, it is proven that DDP-64 is a flexible new cipher with better performance in most of the cases, suitable for wireless communications networks of present and future.
[1] Benes V. E., Mathematical Theory of Connecting Networks and Telephone Traffic, Academic Press, New York, 1965.
[2] Biryukov D. and Wagner D., “Slide Attacks,” in Proceedings of the 6th International Workshop Fast Software Encryption, LNCS, Springer- Verlag, vol. 1636, pp. 245-259, 1999.
[3] Cheung O. Y. H., Tsoi K. H., Leong P. H. W., and Leong M. P., “Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm,” in Proceedings of CHES'2001, LNCS, Springer-Verlag, vol. 2162, pp. 333-37, 2001.
[4] Clos C., “A Study of Nonblocking Switching Networks,” Bell System Technical Journal, vol.32, pp.406-424, 1953.
[5] Goots N., Izotov B., Moldovyan A. A., and Moldovyan N. A., “Fast Ciphers for Cheap Hardware: Differential Analysis of SPECTR- H64,” in Proceedings of the 1st International Workshop, Methods, Models, and Architectures for Network Security, LNCS, Springer-Verlag, vol. 2776, pp. 449-452, 2003.
[6] Goots N., Izotov B., Moldovyan A., and Moldovyan N., Modern Cryptography: Protect Your Data with Fast Block Ciphers, Wayne, A- LIST Publishing, 2003.
[7] Goots N., Moldovyan A. A., and Moldovyan N. A., “Fast Encryption Algorithm SPECTR-H64,” in Proceedings of the 1st International Workshop, Methods, Models, and Architectures for Network Security, LNCS, Springer-Verlag, vol. 2052, pp. 275-286, 2001.
[8] Hamalainen P., Hannikainen M., Hamalainen T., and Saarinen J., “Hardware Implementation of the Improved WEP and RC4 Encryption Algorithms for Wireless Terminals,” in Proceedings of the European Signal Processing Conference (EUSIPCO'2000), Finland, September 2000.
[9] Kaps J. and Paar C., “Fast DES Implementations for FPGAs and its Application to a Universal Key-Search Machine,” in Proceedings of the 5th Annual Workshop on Selected Areas in Cryptography, Canada, August 1998.
[10] Kitsos P., Sklavos P., Papadomanolakis K., and Koufopavlou O., “Hardware Implementation of the Bluetooth Security,” IEEE Pervasive Computing, Mobile and Ubiquitous Systems, vol. 2, no. 1, January-March 2003.
[11] Ko Y. , Hong D., Hong S., Lee S., and Lim J., “Linear Cryptanalysis on SPECTR-H64 with Higher Order Differential Property,” in Proceedings of the 1st International Workshop, Methods, Models, and Architectures for Network Security, LNCS, vol. 2776, pp. 298-307, 2003.
[12] Kwan M., “The Design of the ICE Encryption Algorithm,” in Proceedings of the 4th International Workshop Fast Software Encryption (FSE’97), LNCS, Springer-Verlag, vol. 1267, pp. 69-82, 1997.
[13] Lee C., Hong D., Lee S., Yang H., and Lim J., “A Chosen Plaintext Linear Attack on Block Cipher CIKS-1,” LNCS, Springer-Verlag, vol. 2513, pp. 456-468, 2002.
[14] Maslovsky V. M., Moldovyan A. A., and Moldovyan N. A., “A Method of the Block Encryption of Discrete Data,” Russian patent # 2140710. Bull, no 30, 1999.
[15] McLoone M. and McCanny J. V., “High Performance Single-Chip FPGA Rijndael Algorithm Implementation,” in Proceedings of CHES'2001, LNCS 2162, Springer-Verlag, pp. 65-76, 2001.
[16] Moldovyan A. A., “Fast Block Ciphers Based on Controlled Permutations,” Computer Science Journal of Moldova, vol. 8, no. 3, pp. 270-283, 2000.
[17] Moldovyan A. A. and Moldovyan N. A., “A Cipher Based on Data-Dependent Permutations,” Journal of Cryptology, vol. 15, no. 1, pp.61-72, 2002.
[18] Moldovyan A. A. and Moldovyan N. A., “A Method of the Cryptographical Transformation of Binary Data Blocks,” Russian patent # 2141729. Bull, no 32, 1999.
[19] Portz M., “A Generallized Description of DES- Based and Benes-Based Permutation Generators,” Advances in Cryptology (AUSCRYPT’92), LNCS, Springer-Verlag, vol.718, pp. 397-409, 1992.
[20] Rompay V. B., Knudsen L. R., and Rijmen V., “Differential Cryptanalysis of the ICE Encryption Algorithm,” in Proceedings of the 5th International Workshop Fast Software Encryption (FSE’98), LNCS, Springer-Verlag, vol. 1372, pp. 270-283, 1998.
[21] Schubert A. and Anheier W., “Efficient VLSI Implementation of Modern Symmetric Block Ciphers,” in Proceedings of ICECS’99, Cyprus, 1999.
[22] Weeks B., Bean M., Rozylowicz T., and Ficke C., “Hardware Performance Simulations of Round 2 Advanced Encryption Standard Algorithms,” in Proceedings of the 3rd Advanced Encryption Standard (AES) Candidate Conference, New York, USA, April 13-14, 2000. 32 The International Arab Journal of Information Technology, Vol. 2, No. 1, January 2005
[23] Wilcox D. C., Pierson L. G., Robertson P. J., Witzke E. L., and Gass K., “A DES ASIC Suitable for Network Encryption at 10 Gbps and Beyoned,” in Proceedings of CHES’99, LNCS, Springer-Verlag, vol. 1717, pp. 37-48, 1999.
[24] Zimmermann R., Curiger A., Bonnenberg H., Kaeslin H., Felber N., and Fichtner W., “A 177 Mb/s VLSI Implementation of the International Data Encryption Algorithm,” IEEE Journal of Solid State Circuits, vol. 29, no. 3, March 1994. Nikolay Moldovyan is an honoured inventor of Russian Federation in 2002, a chief researcher with the Specialized Center of Program Systems “SPECTR”, and a professor with the Saint Petersburg Electrical Engineering University. He received his Diploma and PhD from Academy of Sciences of Moldova, 1981. His research interests include computer security, cryptography, and currently developed concept of the variable transformations as a new direction in applied cryptography. He is a member of the IACR. Nicolas Sklavos is a PhD researcher with the Electrical and Computer Engineering Department of the University of Patras, Greece. His interests include computer security, new encryption algorithms design, wireless communications, and reconfigurable computing. He holds an award for his PhD research on “VLSI Designs of Wireless Communications Security Systems” from IFIP VLSI SOC 2003. He is a referee of International Journals and Conferences. He is a member of the IEEE, the Technical Chamber of Greece, and the Greek Electrical Engineering Society. He has authored or coauthored up to 50 scientific articles in the areas of his research. Odysseas Koufopavlou received the Diploma of electrical engineering in 1983 and the PhD degree in electrical engineering in 1990, both from University of Patras, Greece. From 1990 to 1994 he was at the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA. He is currently an associate professor with the Department of Electrical and Computer Engineering, University of Patras. His research interests include VLSI, low power design, VLSI crypto systems, and high performance communication subsystems architecture and implementation. He has published more than 100 technical papers and received patents and inventions in these areas.